Open Position

DFT Engineer

Semiconductor • Chennai • 3 to 5 Years

Posted 13 May 2026
Openings: 1
Last Apply: N/A
ATPG SCAN MBIST Simulation

Job Description

  • Experience in ASIC/DFT simulation and silicon validation.
  • Detailed knowledge of DFT concepts, pattern simulation, silicon debug, and yield enhancement.
  • In-depth knowledge and hands-on experience in ATPG and coverage analysis.
  • Strong understanding of memory verification, repair, and failure root-cause analysis.
  • Experience with any of the following tools is required:
    • ATPG – TestKompress
    • MBIST – Mentor ETVerify
    • Simulation – VCS (preferred), ModelSim
  • Expertise in scripting languages such as Perl, Shell, etc. is an added advantage.
  • Ability to work in an international team and dynamic environment with strong communication skills.
  • Ability to learn and adapt to new tools and methodologies.
  • Ability to multitask and work on several high-priority designs in parallel.
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