Open Position
DFT Engineer
Semiconductor • Chennai • 3 to 5 Years
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Posted 13 May 2026
Openings: 1
Last Apply: 13 May 2026
ATPG
SCAN
MBIST
Simulation
Job Description
Experience in ASIC/DFT – simulation and Silicon validation
Detailed knowledge on DFT concepts, pattern simulation, Silicon debug and yield enhancement
In depth knowledge and hands-on experience in ATPG - coverage analysis.
In depth knowledge of Memory verification, repair and failure root-cause analysis.
Experience with any of these tools is required
ATPG - TestKompress
MBIST - Mentor ETVerify
Simulation - VCS (preferred), modelsim.
Expertise in scripting languages such as Perl, shell, etc. is an added advantage
Ability to work in an international team, dynamic environment with good communication skills
Ability to learn and adapt to new tools and methodologies.
Ability to multitask & work on several high-priority designs in parallel.
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Detailed knowledge on DFT concepts, pattern simulation, Silicon debug and yield enhancement
In depth knowledge and hands-on experience in ATPG - coverage analysis.
In depth knowledge of Memory verification, repair and failure root-cause analysis.
Experience with any of these tools is required
ATPG - TestKompress
MBIST - Mentor ETVerify
Simulation - VCS (preferred), modelsim.
Expertise in scripting languages such as Perl, shell, etc. is an added advantage
Ability to work in an international team, dynamic environment with good communication skills
Ability to learn and adapt to new tools and methodologies.
Ability to multitask & work on several high-priority designs in parallel.