Open Position
Analog Layout Engineer
Semiconductor • Noida • 0-1
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Posted 26 Aug 2026
Openings: 10
Last Apply: 10 Sep 2026
Analog IC Layout fundamentals
CMOS technology and VLSI concepts
Transistor-level layout
Understanding of schematics and circuit connectivity
Layout vs. Schematic (LVS)
Design Rule Check (DRC)
Electrical Rule Check (ERC)
Parasitic Extraction (PEX)
Understanding of Design for Manufacturing (DFM)
Job Description
We are looking for a trained fresher in Analog Layout / VLSI Layout who has a strong understanding of analog layout concepts and hands-on exposure to industry-standard layout tools.