Open Position
DFT Engineer
Semiconductor • Chennai,Bangalore,Noida • 5-8 Years
This job is closed for applications.
Please check other open positions on the careers page.
Posted 15 May 2026
Openings: 9
Last Apply: 05 Jun 2026
JTAG
ATPG DRC
LBIST
Job Description
Key requirements include:
• Hands-on experience in scan insertion, JTAG, ATPG DRC, and coverage analysis
• Proficiency in simulation debug with timing/SDF
• Experience with LBIST and Mixed Signal Radar ICs is highly desirable
• Ability to debug and root cause simulation failures
• Must be proactive, collaborative, and detail-oriented, capable of exercising independent judgment
• Strong interpersonal and communication skills (both oral and written)
• Self-motivated and flexible