Open Position
RTL ENGINEER
RTL • Noida • 3 – 5 YEARS
Posted 07 May 2026
Openings: 10
Last Apply: N/A
CDC
Spyglass
Synthesis
Verilog
Job Description
Should be expert in Verilog Coding
Must have done Synthesis
Must have worked on Scan insertion
Should be familiar with Spyglass CDC/RDC
Should be able to micro architect and code from specifications
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Must have done Synthesis
Must have worked on Scan insertion
Should be familiar with Spyglass CDC/RDC
Should be able to micro architect and code from specifications